FPGA/ASIC Design Engineer

Job ID: 2102

Cinder is looking for an FPGA/ASIC Design Engineer to fill a role for our clients in Portland, OR or San Jose, CA. This is a full time, 40 hour per week direct hire opportunity.   Our client offers all of their full-time employees a full competitive benefits package.

If you are looking to work in a dynamic, motivated, and collaborative environment and would like to deliver cutting edge innovative products to Fortune 500 customers, apply today! With this team, you will have a direct contribution to a product's success. Come take pride in all you can do and all you can accomplish!

Required Skills:

  • Ph.D, M.S or B.S in CS/EE or a related major
  • 2+ years' experience in RTL Development (Verilog, System Verilog, and/or VHDL)
  • 2-5 years of experience in FPGA/ASIC Development (Verilog, System Verilog, and/or VHDL)
  • Experience in Programming Embedded Firmware (Strongly Preferred)
  • Experience developing and using UVM technologies
  • Comfortable with designing both high-level architecture and individual modules
  • Experience using scripting languages for verification (Python preferred)
  • Experience in Linux and/or embedded systems
  • Team work and proactive sharing of knowledge

Work Environment:

  • Job Location:  Must be done onsite
  • Shift:  Normal business hours

If you are looking for a professional, challenging, stimulating environment and meet the above criteria, please apply now!!

US Citizens and all other parties authorized to work in the US are encouraged to apply.  We are unable to sponsor at this time.  No third party candidates considered for this position.

Cinder is a rapidly growing consulting firm based in Beaverton, OR. We are bringing a new perspective to the staffing industry, providing a better experience for both customers and employees. Our collaborative company culture and positive work environment are a refreshing alternative to traditional staffing firms!

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